AI could add $6 billion to electronic design-automation market

This analysis is by Bloomberg Intelligence Senior Industry Analyst Niraj Patel and Senior Associate Analyst Maria Beltran. It appeared first on the Bloomberg Terminal.

Electronic design-automation providers stand to gain $6 billion through 2030, our AI scenario analysis shows, with AI-enabled tools like Synopsys’ DSO.ai and Cadence’s Cerebrus seeing performance gains among its customers, which could mean greater contract values. Large-language-model development is a major driver of complex chip designs, boosting the use of EDA.

AI’s effect might net $6 billion

The size of the electronic design-automation (EDA) market could expand by $6 billion in value by 2030, we calculate, on AI products that bolster tool productivity and increase efficiency across the design workflow. In our AI scenario, the biggest gains are likely to accrue to market leaders Synopsys and Cadence, followed by Siemens (Mentor Graphics).

The effect of AI on the EDA market, which is already at $12 billion, could be sizable. We modeled two key levers for our scenario: the percentage of AI in companies’ EDA portfolios and efect on contract value. Our starting points use AI-EDA product introductions, performance and productivity gains across EDA tools and companies’ comments on AI contract-values.

Design push sustaining higher growth

Bloomberg Intelligence’s electronic design-automation analysis sees the EDA market at $23.9 billion by 2030, yielding a compound annual growth rate of 11.8% from 2024-30. This rate is poised to exceed forecast expansion by 200 bps, as well as the overall semiconductor market (440 bps), application-specific chips (230 bps) and semiconductor R&D expense (540 bps).

The EDA sales ratio to several chip-industry measures (wafer shipments, semis R&D and chip sales) appears set to grow through 2030. Increasingly complex chip designs used to power AI applications presses more design, IP and packaging innovation, given transistor growth and manufacturing limitations (reticle size of 858 square millimeters).

At 3-4%, EDA is a small portion of the overall $400 billion semiconductor value chain.

 AI-EDA pushing sales forecast higher

There’s been significant gains in AI-enabled EDA tool evaluations yielding substantial productivity and performance improvements vs. traditional methods. In chip-design exploration, Synopsys points to its DSO.ai achieving a better performance, power and area (PPA) design with a single engineer in several weeks vs. the traditional approach of multiple engineers with manual sweeps across many months. Given the better PPA, several customers have related success stories; Microsoft referenced a 3% total power improvement for a 5-nanometer high-performance computing design by using Synopsys’ power toolbox.

Cadence continues to update its PPA traction across a broad range of applications, from an 8x improvement in engineering hours for a 5-nm GPU design to a 30% reduction in leakage power for a server GPU in 4-nm

Ansys, Cadence on par with leaders

Despite far smaller scale, Ansys ($2.5 billion in sales) and Cadence’s ($4.7 billion) adjusted operating margins are on par with megacap software companies Microsoft ($280 billion) and Adobe ($21 billion). Electronic design-automation and simulation software companies may see margin tailwinds from AI-enabled EDA tools. Ansys’ simulation leadership led to an average adjusted operating margin of 45% in the past decade, outpacing engineering- and application-software peers. Cadence bested Synopsys’ adjusted operating margins by 700 bps (32% vs. 25%) in the past 10 years, mostly on better investment execution and Synopsys’ lower margin mix, IP and security software.

Ansys’ non-GAAP operating margin of 43% in 2023 excluded adjustments of 15% of sales, with stock-based compensation and amortization of intangibles the bulk.

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