Huh? Chipmakers Copying Steelmakers?

The semiconductor industry is taking a page from the steel industry of the 1970s? Incredible as it sounds, it may be true. Like integrated steel plants, chip factories tend to be huge and expensive--the $1 billion wafer-fabrication plant Intel Corp. is building near Albuquerque is an example. In a bid

to cut costs, a new breed of smaller "wafer fab" has been quietly emerging in the 1990s, with dramatic implications. "It's exactly like what happened with steel mills," declares Paul P. Castrucci, a consultant who headed IBM's chipmaking operations in Burlington, Vt., until 1987. "The big steel producers tried to buy econonmies of scale. But minimills were the way to go." The future of chips, he adds, is in minifabs.

Like their cousins in steel, minifabs are smaller, more automated, more nimble versions of much larger plants. What they lack in scale, they make up for in speed. Today, just 14 of the world's 400-odd chip plants are classed as minifabs. But the concept has strong backing within Sematech Inc., the U.S. chip-equipment consortium, and its European counterpart, the Joint European Submicron Silicon Initiative, as well as within Semiconductor Equipment & Materials International, a trade group of suppliers. All three are working on minifab standards, so look for many more such plants to sprout soon.

Next February, for instance, Zilog Inc. will open a $200 million minifab near Boise, Idaho, that Chairman Edgar A. Sack says will "be just as efficient as anything Intel has." Even Jack L. Saltich, manager of the $900 million plant that Advanced Micro Devices Inc. is building in Austin, Tex., figures the current archetype is past its prime. "This round of wafer fabs will be the last of the `ballroom' generation," he says, where workers dress in bunny suits to waltz silicon wafers around vast, airtight clean rooms.

The reason is cost. Financial analyses suggest that when the price of a wafer fab hits $2 billion, probably by 1998, even Intel, the world's most profitable chipmaker, will have trouble recouping the investment, says G. Dan Hutcheson, president of market researcher VLSI Research Inc. That would trigger a break in the chip industry's 35-year tradition of offering ever-more-powerful chips at no increase in price.

DRESS DOWN. Designers of minifabs hope to avoid that with a radically new approach. In their plants, the production steps that turn silicon disks into hundreds of fingernail-size chips take place inside so-called minienvironments--clean rooms within clean rooms. The idea is to prevent damage to the wafers from tiny airborne particles by isolating just the wafers, not the workers who produce them. "That makes sense," notes Sack. "Wafers are a lot smaller than people." Air-quality standards elsewhere can be relaxed, so it's good-bye to bunny suits.

Just getting rid of these cumbersome clothes can save $1.7 million (table, page 98), according to a six-month study sponsored by Fluor Daniel Inc., a Greenville (S.C.) construction engineering firm. It brought together 23 leading suppliers, including Advanced Materials, KLA Instruments, and Silicon Valley Group. Led by Castrucci, they were to map a blueprint for an optimum-size minifab. The $419 million "strategic future fab" they came up with would produce 15,000 wafers a month, vs. 25,000 for the latest megafabs--and 1,000 to 5,000 wafers a month in many existing minifabs. But in most other respects, this future fab would outdo even a megafab, Castrucci claims.

Rethinking the plant floor and grouping equipment in clusters should cut the time required for wafers to jump through some 200 processing hoops from the present 60-90 days to just 7. That's because wafers wouldn't spend 90% or more of their shop-floor time being shuffled between operations and sitting in queues. "You can get new parts to market sooner," says Castrucci, "while prices are at their peak." Studies have shown that in hotly competitive chip markets, getting to market a few months earlier can produce as much as $1 billion in additional revenues.

BUG SQUASHER. Couple the new layout with a real-time control system--oddly enough, now a rarity in chip plants--and wafers can be processed individually instead of in batches of 25 or more. This would give the minifab greater flexibility for handling small orders or a larger stable of chip designs. Moreover, the control system would have sensors that keep close watch over processing conditions to minimize variations, and this should help the fab wring out the inevitable bugs in new equipment faster. In fact, the Fluor Daniel team estimates that its minifab could reach full commercial production in one year--half the normal time. "The bottom line," says Castrucci, "is that this fab would turn out 60% more shippable chips in the first two years--and earn back its investment in 10 months," instead of the usual two years or more.

William J. Barnett, director of technology development at Fluor Daniel, concedes that many of these concepts resemble innovations developed by Texas Instruments Inc. for its microelectronics manufacturing science and technology (MMST) prototype fab (BW--July 4). "But TI custom-built many of its MMST tools. We wanted to use commercial equipment." Chief among these are the wafer-handling systems developed by Asyst Technologies Inc. in Milpitas, Calif., a minifab pioneer. For instance, one part of Asyst's standard mechanical interface (SMIF) system is a so-called pod that carries wafers between processing steps in a superclean environment.

As a pod moves to the next piece of equipment, it signals the plant's central computer, which automatically programs the next tool with the "recipe" for the wafers in that pod. "There's no more job-floor knob twiddling," says Sack of Zilog, which will use SMIF in its Idaho minifab. Asyst introduced its system in 1984, and IBM has been a major booster: Four IBM fabs use it, as do ones at NCR Corp. and Taiwan Semiconductor Manufacturing Co.

Intel's manufacturing head, Senior Vice-President Gerhard H. Parker, says he's familiar with the minifab idea but doesn't buy it. The real key to chipmaking efficiency, he insists, remains high-volume output from megafabs. "Companies like Intel," says Timothy A. Vogel, engineering project leader for a planned $150 million minifab at NCR's Microelectronics Div. in Fort Collins, Colo., "are driven by profit margins that shield them from having to look at this technology." But that may not be true much longer. When circuit lines shrink below 0.25 microns, or 1/300 the width of a human hair, says AMD's Saltich, minienvironments probably will be the only feasible way of keeping the wafers clean. And such wispy circuits may show up on advanced chips by 2000.

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