Chip Design Shortcuts Are Synopsys' Long Suit

Harvey C. Jones cracks a smile at the word: arrogant. It's a criticism often leveled against his company, Synopsys Inc., and no wonder. The Mountain View (Calif.) upstart proclaims itself the leader in a new generation of electronic-design software that will bury current leaders Cadence Design Systems Inc. and Mentor Graphics Corp. His competitors are just jealous, says Jones, who compares his burden to that of software king Microsoft Corp.

It's easy to forgive him a little hubris. Five years after spinning off from General Electric Co., Synopsys holds a 70% share of its chief market--specialized software that is used to speed chip design. Nearly every major chipmaker now uses it, from Intel Corp. to NEC Corp. So do computer makers such as Apple, Sun Microsystems, and Sony. Synopsys' sales jumped 56%, to $63 million, in the fiscal year ended Sept. 30, and its profits doubled, to $7.1 million. At its Jan. 11 close of 3612, the stock traded at a stratospheric 50 times estimated 1993 earnings.

large cookies. The big appeal is Synopsys' so-called logic synthesis software. To design the most advanced new chips, engineers must plot the exact placement of millions of transistors and interconnecting wires that form intricate circuitry. Current software for doing this--such as that from Cadence and Mentor--automates the time-consuming process by letting engineers connect symbols on a workstation screen.

But chips continue to grow 10 times more complex every six years or so--and in many cases, designs must be done in months instead of years. In fact, most current design software may not be sophisticated enough to handle the chips engineers envision for the mid-1990s. Says Synopsys cofounder Aart J. De Geus: "At some point, your oven just isn't large enough for the cookies."

Synopsys is exploiting that opportunity. The software it pioneered frees engineers from having to plot each so-called logic circuit. Instead, they use a special computer language to provide detailed instructions for thousands of design features. The software translates the descriptions into transistors and wires and adjusts their placement on the chip to make it as fast and small as possible.

Relentless. This can be a big advantage. Using synthesis, NCR Corp. cut its custom-chip design time by 30%. Even rivals, who are trying to catch up by perfecting similar technology, concede that Synopsys' program does the job faster and more accurately than theirs.

The company also markets programs that simulate chip performance and automatically modify designs for easy testing of the chips. And last month, Synopsys began selling libraries of synthesized basic circuit designs that can be used as building blocks for designing more advanced chips.

Still, Silicon Valley's relentless cycle has already spawned startups that aspire to overtake Synopsys. For instance, Redwood Design Automation Inc. in San Jose, Calif., is working on leading-edge software that would automate the design of entire electronic systems--say a TV remote control or even a computer. So as he rides his technology wave, Jones will have to worry about being swamped by the next one.

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