Cadence Design Systems, Inc. develops system design enablement (SDE) solutions for designing whole electronics systems, small and complex integrated circuits (ICs), and electronic devices. The company’s SDE product offerings include electronic design automation (EDA) software, emulation and prototyping hardware, system interconnect and analysis and two categories of intellectual property (IP), commonly referred to as verification IP (VIP) and design IP. The company provides maintenance for its software, hardware, and IP product offerings. The company also provides engineering services related to methodology, education, hosted design solutions and design services for advanced ICs and development of custom IP. These services help its customers manage and accelerate their electronics product development processes. Products The company’s products are engineered to improve its customers’ design productivity and design quality by providing a set of SDE solutions, including EDA software, emulation and prototyping hardware and a differentiated portfolio of design IP and VIP. The company combines its products and technologies into categories related to major design activities, such as Functional Verification, including Emulation and Prototyping Hardware; Digital IC Design and Signoff; Custom IC Design; System Interconnect and Analysis; and IP. Functional Verification, Including Emulation and Prototyping Hardware Functional verification products are used by the company’s customers to verify that the circuitry they have designed would perform as intended. Verification takes place before implementing or manufacturing the circuitry, significantly reducing the risk of discovering an error in the completed product. The company’s functional verification offerings include two major categories, such as logic verification and system design and verification. The company’s logic verification software offering consists of planning, testbench automation, simulation, hardware acceleration, JasperGold formal verification and environment capabilities within the Incisive functional verification platform and Palladium verification computing platform. This offering enables the company’s customers to coordinate verification activities across multiple teams and various specialists for verification planning and closure. The company’s system design and verification offerings consist of hardware-assisted verification solutions employing emulation and acceleration, including the Palladium verification computing platforms, Protium rapid prototyping platform, system-level design tools, accelerated VIP, estimation of system-on-chip (SoC) cost and performance and automation for hardware-software verification. In addition, this offering provides system power exploration, analysis and optimization. During 2015, the company launched the newest addition to the Palladium family, the Palladium Z1 enterprise verification computing platform. Palladium Z1 provides high throughput, capacity, datacenter reliability and workgroup productivity to enable global design teams to develop advanced hardware-software systems. Digital IC Design and Signoff Digital IC design offerings are used by the company’s customers to create logical representations of a digital circuit or an IC that could be verified for correctness prior to implementation. Once the logic is verified, the design representation is implemented, or converted to a format ready for silicon manufacturing, using additional software tools within this category. The manufacturing representation is also analyzed and verified. The company’s digital IC offerings include three major categories, such as logic design, physical implementation and signoff. The company’s logic design offering includes logic synthesis, test and equivalence checking capabilities and is typically used by customers to create and verify designs in conjunction with the company’s functional verification capabilities. This offering provides chip planning, design, verification and test technologies and services to customers. During 2015, the company launched the Genus synthesis solution, a new logic synthesis offering. Th
cadence design sys inc (CDNS:NASDAQ GS)
2655 Seely Avenue
San Jose, CA 95134
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