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Last $47.14 USD
Change Today +0.83 / 1.79%
Volume 1.1M
SNPS On Other Exchanges
Symbol
Exchange
NASDAQ GS
As of 5:20 PM 09/3/15 All times are local (Market data is delayed by at least 15 minutes).

synopsys inc (SNPS) Snapshot

Open
$46.73
Previous Close
$46.31
Day High
$47.59
Day Low
$46.18
52 Week High
08/19/15 - $52.65
52 Week Low
10/16/14 - $36.62
Market Cap
7.4B
Average Volume 10 Days
1.2M
EPS TTM
$1.54
Shares Outstanding
155.9M
EX-Date
--
P/E TM
30.6x
Dividend
--
Dividend Yield
--
Current Stock Chart for SYNOPSYS INC (SNPS)

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synopsys inc (SNPS) Details

Synopsys, Inc. provides electronic design automation (EDA) software products used to design and test integrated circuits and electronic systems in the United States, Europe, Japan, and the rest of Asia Pacific. Its EDA solutions include Galaxy Design platform that provides integrated chip design solution; Verification Continuum Platform, which offers virtual prototyping, static and formal verification, simulation, emulation, field-programmable gate array (FPGA)-based prototyping, and debug; and FPGA design products that are complex chips programmed to perform specific functions. The company also offers DesignWare intellectual property (IP) solutions for USB, PCI Express, DDR, Ethernet, SATA, and HDMI; analog IP for analog-to-digital data conversion, audio, and video; and system-on-chip (SoC) infrastructure IP, including minPower datapath components, ARM AMBA interconnect fabric and peripherals, and verification IP. In addition, it provides logic libraries and embedded memories; configurable processor cores and application-specific instruction-set processors for embedded and deeply embedded designs; and IP subsystems for audio and sensor functionality. Further, the company offers Platform Architect software that enables exploration of SoC architectural trade-offs; SPW and System Studio tools for algorithm design; Processor Designer software for custom processor design; Synphony Model and C Compiler for high-level synthesis; Virtualizer tool and transaction-level models to create virtual prototypes and functional software models; Seeker, an interactive application security testing solution; and HAPS FPGA-based prototyping systems. Additionally, it provides software quality, testing, and security tools; manufacturing solutions that enable semiconductor manufacturers to develop fabrication processes; and consulting and design services for various phases of SoC development process. The company was founded in 1986 and is headquartered in Mountain View, California.

9,436 Employees
Last Reported Date: 12/15/14
Founded in 1986

synopsys inc (SNPS) Top Compensated Officers

Co-Chief Executive Officer, President and Dir...
Total Annual Compensation: $500.0K
Co-Founder, Chairman and Co-Chief Executive O...
Total Annual Compensation: $500.0K
Chief Administrative Officer and Executive Vi...
Total Annual Compensation: $400.0K
General Counsel and Corporate Secretary
Total Annual Compensation: $154.8K
Executive Vice President of Sales and Corpora...
Total Annual Compensation: $399.6K
Compensation as of Fiscal Year 2014.

synopsys inc (SNPS) Key Developments

Synopsys, Inc. Promotes Sudhindra (Sujit) Kankanwadi to Vice President and Corporate Controller and Appoints as Principal Accounting Officer

On September 1, 2015, Sudhindra (Sujit) Kankanwadi was promoted to Vice President and Corporate Controller of Synopsys Inc. and was appointed by the Board of Directors of Synopsys as Synopsys' principal accounting officer, effective immediately. Mr. Kankanwadi, age 44, joined Synopsys in March 2010 as Accounting Director. Prior to Synopsys, most recently as Senior Manager, in the Audit practice of KPMG LLP.

Synopsys Announces Availability of Logic Library and Embedded Memory IP for Mie Fujitsu Semiconductor 40-nm Low-Power Process

Synopsys Inc. announced the availability of DesignWare Logic Library and Embedded Memory IP for the Mie Fujitsu Semiconductor 40-nanometer low-power (40LP) process. Designers using the Mie Fujitsu Semiconductor 40LP process can integrate DesignWare Logic Library and Embedded Memory IP to optimize the power efficiency and performance of their designs. The IP is made available through Synopsys' Foundry-Sponsored IP Program, which enables designers to license the DesignWare Logic Library and Embedded Memory IP at no cost. DesignWare Logic Libraries give engineers the ability to optimize their entire SoC design for speed and energy efficiency by including 9-track high-density and 12-track high-speed libraries with long channels, and power optimization kits to reduce power consumption. High-speed, high-density and low-voltage DesignWare Embedded Memories offer multiple power management modes including light sleep, deep sleep and shutdown-with-retention to enable designers to meet aggressive power targets and extend the battery life of their products. The DesignWare Logic Libraries and Embedded Memories supporting Mie Fujitsu Semiconductor's 40LP process are now available at no cost to qualified licensees as part of Synopsys' Foundry-Sponsored IP Program.

Synopsys, Inc. Announces the 2015.06 Release of IC Validator

Synopsys Inc. announced the 2015.06 release of its comprehensive physical verification signoff product, IC Validator. The 2015.06 release focuses on refinements to the core engines to deliver a 2X memory footprint reduction. With IC Validator 2015.06, designers can extend the use of their current workstations and manage multiple concurrent jobs with greater ease. The new release delivers 20% faster signoff DRC performance on average and is as much as 2X faster in many cases. IC Validator extends support for emerging process nodes and FinFET technology with new four-color patterning decomposition and verification support. IC Validator is the key technology enabler for In-Design physical verification in the IC Compiler and IC Compiler II place and route solutions. IC Validator In-Design in the 2015.06 release introduces timing- and density-aware track-based metal fill that offers higher density than foundry fill while maintaining pre-fill design timing. Additionally, In-Design automated DRC repair (ADR) refinements now deliver a fix rate of greater than 80%, with many designs achieving fix rates of 100%. Advances in process technology and ever-increasing design complexity have placed growing demand on physical verification products to check many more design rules. This evolution has created intense interest among IC designers in a new physical verification solution geared specifically to address these challenges. IC Validator is a comprehensive physical verification product including design rule checks (DRC), layout-vs.-schematic (LVS) checks, programmable extended electrical rule checking (EERC) and metal fill insertion. IC Validator's modern architecture and excellent multi-core scalability make Synopsys Inc. announced the 2015.06 release of its comprehensive physical verification signoff product, IC Validator. The 2015.06 release focuses on refinements to the core engines to deliver a 2X memory footprint reduction. With IC Validator 2015.06, designers can extend the use of their current workstations and manage multiple concurrent jobs with greater ease. The new release delivers 20% faster signoff DRC performance on average and is as much as 2X faster in many cases. IC Validator extends support for emerging process nodes and FinFET technology with new four-color patterning decomposition and verification support. IC Validator is the key technology enabler for In-Design physical verification in the IC Compiler and IC Compiler II place and route solutions. IC Validator In-Design in the 2015.06 release introduced timing- and density-aware track-based metal fill that offers higher density than foundry fill while maintaining pre-fill design timing. Additionally, In-Design automated DRC repair (ADR) refinements now deliver a fix rate of greater than 80%, with many designs achieving fix rates of 100%. Advances in process technology and ever-increasing design complexity have placed growing demand on physical verification products to check many more design rules. This evolution has created intense interest among IC designers in a new physical verification solution geared specifically to address these challenges. IC Validator is a comprehensive physical verification product including design rule checks (DRC), layout-vs.-schematic (LVS) checks, programmable extended electrical rule checking (EERC) and metal fill insertion. IC Validator's modern architecture and excellent multi-core scalability make it the signoff tool of choice for a growing number of designers, from those developing small analog chips to those designing the largest, most advanced digital chips. it the signoff tool of choice for a growing number of designers, from those developing small analog chips to those designing the largest, most advanced digital chips.

 

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SNPS

Industry Average

Valuation SNPS Industry Range
Price/Earnings 30.7x
Price/Sales 3.3x
Price/Book 2.3x
Price/Cash Flow 19.6x
TEV/Sales 2.7x
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