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Last $46.42 USD
Change Today +0.63 / 1.38%
Volume 597.9K
SNPS On Other Exchanges
As of 5:20 PM 03/30/15 All times are local (Market data is delayed by at least 15 minutes).

synopsys inc (SNPS) Snapshot

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02/25/15 - $47.37
52 Week Low
04/15/14 - $36.03
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synopsys inc (SNPS) Details

Synopsys, Inc. provides electronic design automation (EDA) software products used to design and test integrated circuits and electronic systems in the United States, Europe, Japan, and the rest of Asia Pacific. Its EDA solutions include Galaxy Design platform that provides integrated chip design solution; Verification Continuum Platform, which offers virtual prototyping, static and formal verification, simulation, emulation, field-programmable gate array (FPGA)-based prototyping, and debug; and FPGA design products that are complex chips customized or programmed to perform specific functions. The company also offers DesignWare intellectual property (IP) solutions that comprise solutions for interfaces, such as USB, PCI Express, DDR, Ethernet, SATA, and HDMI; analog IP for analog-to-digital data conversion, audio, and video; and system-on-chip (SoC) infrastructure IP, including minPower datapath components, ARM AMBA interconnect fabric and peripherals, and verification IP. In addition, it provides logic libraries and embedded memories; configurable processor cores and application-specific instruction-set processors for embedded and deeply embedded designs; and IP subsystems for audio and sensor functionality. Further, the company offers Platform Architect software that enables exploration of SoC architectural trade-offs; SPW and System Studio tools for algorithm design; Processor Designer software for custom processor design; Synphony Model and C Compiler for high-level synthesis; Virtualizer tool and transaction-level models to create virtual prototypes and functional software models; and HAPS FPGA-based prototyping systems. Additionally, it provides software quality, testing, and security tools; manufacturing solutions that enable semiconductor manufacturers to develop fabrication processes; and consulting and design services for various phases of SoC development process. The company was founded in 1986 and is headquartered in Mountain View, California.

9,436 Employees
Last Reported Date: 12/15/14
Founded in 1986

synopsys inc (SNPS) Top Compensated Officers

Co-Chief Executive Officer, President, Direct...
Total Annual Compensation: $500.0K
Co-Founder, Chairman and Co-Chief Executive O...
Total Annual Compensation: $500.0K
Chief Administrative Officer and Executive Vi...
Total Annual Compensation: $400.0K
General Counsel and Corporate Secretary
Total Annual Compensation: $154.8K
Executive Vice President of Worldwide Sales &...
Total Annual Compensation: $399.6K
Compensation as of Fiscal Year 2014.

synopsys inc (SNPS) Key Developments

Synopsys, Inc. Announces Availability of New ASIP Designer Tool

Synopsys Inc. announced availability of its new ASIP Designer tool that speeds the design of application-specific instruction-set processors (ASIPs) and programmable accelerators. ASIP Designer's language-based approach allows the automatic generation of synthesizable RTL and software development kits (SDKs) from a single input specification, accelerating the processor design and verification effort by up to 5X compared to traditional manual approaches. ASIPs are deployed in a wide range of signal-processing intensive applications, including wireless base stations, mobile handsets, audio processing, image processing and cloud computing. ASIP Designer enables users to explore multiple processor architecture alternatives in minutes. Using a single input specification in the nML language, the tool automatically generates both the synthesizable RTL of the processor as well as an SDK that includes an optimizing C/C++ compiler, instruction set simulator, linker, assembler, software debugger and profiler. This ensures consistency of the hardware and the SDK at all stages of the design process. The patented compiler generation technology includes an LLVM compiler front-end and support for the OpenCL kernel language.  Immediate availability of the compiler enables users to run their C, C++ and OpenCL application code on the automatically-generated instruction-set simulator as soon as the nML-based description is available. With this unique 'compiler-in the-loop' approach as well as the extensive profiling capabilities of the debugger, ASIP Designer users can rapidly analyze and explore ASIP architectures and instruction sets to find the optimal power and performance design points for the target application. ASIP Designer also automatically generates a SystemC-based transaction-level model, allowing pre-silicon software development using virtual prototypes such as those designed with Synopsys' Virtualizer tool set. A common and easy-to-use flow from RTL generation to instantiation in the HAPS FPGA-based prototyping system, in addition to the automatic generation of JTAG-based on-chip debug logic, enables designers to integrate the ASIP into the system-on-chip (SoC) design and connect the prototype with real-world I/Os to validate the hardware-software integration.

Synopsys, Inc. Unveils Virtualizer Tool for Creating Virtualizer Development Kits

Synopsys Inc. has unveiled its Virtualizer tool for creating Virtualizer Development Kits, or VDKs. The latest Virtualizer release implements new features including MultiSim, SimSight and FastBuild to increase VDK simulation performance by up to 5X and accelerate VDK availability for earlier software development. The latest features in the Virtualizer tool enable virtual prototyping teams to create VDKs more quickly and with higher performance compared to using build-your-own SystemC-based modeling efforts. MultiSim optimizes the use of multi-core hosts for parallel execution of VDKs, accelerating simulation performance by up to 5X for SoCs consisting of independent subsystems or electronic systems using multiple SoCs. SimSight delivers enhanced system wide simulation profiling, which shows the number of SystemC process activations, signal events and TLM-2.0 transactions, to address simulation speed bottlenecks and identify where to optimize the code for up to 5X increased performance. FastBuild improves virtual prototype development time by using dynamic libraries to assemble a VDK, speed turnaround time of complex full-scale virtual prototypes, create derivative versions and quickly deploy updates to software teams. This latest release of Virtualizer incorporates differentiated virtual prototyping features that help developers start their software development even earlier and increases the simulation performance of VDKs for more efficient software bring up, debug and test.

Synopsys Enables Continuous Debug Innovation with More Than 200 VC Apps Now Available on the Verdi Platform

Synopsys Inc. now has more than 200 debug and analysis apps available on the VC Apps Exchange portal and in the Verdi® VC Apps Toolbox, demonstrating rapid momentum for customized applications that drive continuous innovation and further enable system-on-chip (SoC) teams to address their debug challenges. Synopsys' VC Apps provide direct access to the design, environment and verification information in Synopsys'Verdi open and extensible debug platform, which is widely used for all major simulation, emulation, formal and static verification flows. Through strong customer and third-party EDA company participation, the range of capabilities available as VC Apps has expanded to the areas of low power design analysis and enhanced debug collaboration. With debug consuming as much as 50% of verification time and effort due to the complexities of present designs, constant innovation and customization are needed. To make debug maximally efficient, VC Apps provide users with the tools to create custom applications to overcome their unique design and verification challenges. Through Synopsys' collaboration with customers and partners globally, the number of available VC Apps continues to grow. Now with more than 200 apps available, customers have access to capabilities that address many design challenges including design exploration, design rule validation, debug automation, debug waveform investigation, power estimation and exploration, technology integration and design manipulation. These customizations and automated work flows boost productivity and help design teams address their unique and changing verification challenges. VC Apps are available now at the VC Apps Exchange, as well as through the VC Apps Toolbox in the general availability release of Verdi. These technologies are also included as part of Synopsys' Verification Compiler product.


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Price/Sales 3.3x
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