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Last $42.98 USD
Change Today 0.00 / 0.00%
Volume 0.0
SLAB On Other Exchanges
Symbol
Exchange
Munich
As of 8:10 PM 08/4/15 All times are local (Market data is delayed by at least 15 minutes).

silicon laboratories inc (SLAB) Snapshot

Open
$42.94
Previous Close
$43.08
Day High
$43.71
Day Low
$42.63
52 Week High
06/18/15 - $58.54
52 Week Low
10/13/14 - $36.29
Market Cap
1.8B
Average Volume 10 Days
513.8K
EPS TTM
$0.96
Shares Outstanding
43.0M
EX-Date
--
P/E TM
44.8x
Dividend
--
Dividend Yield
--
Current Stock Chart for SILICON LABORATORIES INC (SLAB)

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silicon laboratories inc (SLAB) Details

Silicon Laboratories Inc., a fabless semiconductor company, designs, develops, and markets mixed-signal analog intensive integrated circuits (ICs). The company offers broad-based products, including microcontrollers; timing devices comprising clocks and oscillators; power and isolation products; and optical, proximity, ambient light, and relative humidity/temperature sensors. It also provides broadcast products, such as video tuners and demodulators, and broadcast radio receivers and transmitters; and access products comprising ProSLIC Subscriber Line Interface Circuits for voice over IP, ISOmodem embedded modems, and Power over Ethernet power source equipment and powered device ICs. The company offers ICs for use in various electronic products in a range of applications, including portable devices, AM/FM radios and other consumer electronics, networking equipment, test and measurement equipment, industrial monitoring and control, home automation, and customer premises equipment. It markets its products through its direct sales force, as well as through a network of independent sales representatives and distributors in the United States, China, Taiwan, South Korea, and internationally. The company was founded in 1996 and is headquartered in Austin, Texas.

1,107 Employees
Last Reported Date: 02/6/15
Founded in 1996

silicon laboratories inc (SLAB) Top Compensated Officers

Chief Executive Officer, Director and Member ...
Total Annual Compensation: $513.5K
President and Director
Total Annual Compensation: $375.0K
Chief Financial Officer and Senior Vice Presi...
Total Annual Compensation: $321.2K
Chief Strategy Officer and Senior Vice Presid...
Total Annual Compensation: $128.4K
Senior Advisor
Total Annual Compensation: $345.4K
Compensation as of Fiscal Year 2014.

silicon laboratories inc (SLAB) Key Developments

Silicon Labs Introduces Thread Networking Solution

Silicon Labs introduced its highly anticipated Thread networking solution, delivering a software stack built upon years of mesh networking expertise and the industry’s most advanced mesh networking software development tools. Silicon Labs’ Thread solution offers developers the fast path to developing Thread-compliant products for the IoT including thermostats, wireless sensor networks, smoke/carbon monoxide detectors, connected lighting devices, control panels, wireless access points and gateways. Silicon Labs’ Thread solution offers a simple, secure and scalable way to wirelessly interconnect hundreds of connected home devices and to seamlessly bridge those devices to the Internet. Thread software provides a self-healing, IPv6-based mesh network capable of scaling to 250+ nodes with no single point of failure. The protocol provides extensive support for “sleepy” end nodes to enable years of low-energy operation using a single battery as well as simplified commissioning. Users can easily add nodes to a network using a smar tphone or browser. Silicon Labs’ Thread stack uses banking-class, end-to-end security to join nodes to the network and proven AES-128 cryptography to secure all networking transactions.

Silicon Laboratories Inc. Introduces an Integrated Clock IC for Wireless Infrastructure Applications

Silicon Laboratories Inc. introduced an integrated clock IC for wireless infrastructure applications including small cell and macro cell base stations. The company's new Si5380 clock generator is the clock IC capable of replacing a low phase noise integer-N clock, voltage-controlled crystal oscillator (VCXO), discrete loop filters and voltage regulator components with one single-chip device. The Si5380 clock provides comparable phase noise performance to discrete conventional solutions while delivering breakthrough advancements in solution footprint, bill of materials (BOM) cost, power consumption, performance and ease of use. The Si5380 clock leverages the company's latest fourth-generation DSPLL technology to provide a purpose-built solution optimized for next-generation small cells and macro cell remote radio head (RRH) designs. DSPLL technology's innovative dual-loop mixed-signal architecture integrates a single high-performance 15 GHz analog voltage-controlled oscillator within a digital phase-locked-loop (PLL) architecture that eliminates the need for discrete loop filters and low-drop-out (LDO) regulators. The resulting clock solution provides an optimal combination of ultra-low phase noise clock synthesis with best-in-class PLL integration. The Si5380 clock has a 66% smaller printed circuit board (PCB) footprint and 30% lower power consumption than competing VCXO-based clock IC solutions. Power-efficient timing components are especially important for today's small cells, which have limited power budgets and often are powered using Power over Ethernet (PoE) technology. Given that the DSPLL integrates all PLL and power supply regulation elements on-chip, the Si5380 device delivers high board-level noise immunity, integrated power supply noise rejection and consistent, repeatable phase noise performance across temperature. While VCXO-based clock solutions often suffer from degraded spurious performance when subjected to vibration, the Si5380 device's integrated DSPLL technology provides excellent spurious response regardless of the system environment.

Silicon Labs Announces Industry’s First Single-Chip Clock IC for Wireless Base Stations

Silicon Labs introduced the industry’s most highly integrated clock IC for wireless infrastructure applications including small cell and macro cell base stations. Silicon Labs’ new Si5380 clock generator is the industry’s first clock IC capable of replacing a low phase noise integer-N clock, voltage-controlled crystal oscillator (VCXO), discrete loop filters and voltage regulator components with one single-chip device. The Si5380 clock provides comparable phase noise performance to discrete conventional solutions while delivering breakthrough advancements in solution footprint, bill of materials (BOM) cost, power consumption, performance and ease of use. According to a recent Cisco study, global mobile data traffic will soar nearly ten-fold between 2014 and 2019, driven by video streaming services and the widespread adoption of IoT-connected devices. While base station suppliers are tasked with developing new 4G/LTE equipment that increases network capacity and coverage, it is becoming an increasingly difficult design challenge for small cells because they are often deployed in space-constrained, low-power outdoor locations in congested urban environments. Silicon Labs’ new Si5380 clock is the industry’s first single-chip wireless clock IC optimized for size, power, integration and performance, making it an ideal fit for small cell applications. The Si5380 clock leverages Silicon Labs’ latest fourth-generation DSPLL technology to provide a purpose-built solution optimized for next-generation small cells and macro cell remote radio head (RRH) designs. DSPLL technology’s innovative dual-loop mixed-signal architecture integrates a single high-performance 15 GHz analog voltage-controlled oscillator within a digital phase-locked-loop (PLL) architecture that eliminates the need for discrete loop filters and low-drop-out (LDO) regulators. The resulting clock solution provides an optimal combination of ultra-low phase noise clock synthesis with best-in-class PLL integration. The Si5380 clock has a 66% smaller printed circuit board (PCB) footprint and 30% lower power consumption than competing VCXO-based clock IC solutions. Power-efficient timing components are especially important for today’s small cells, which have limited power budgets and often are powered using Power over Ethernet (PoE) technology. Given that the DSPLL integrates all PLL and power supply regulation elements on-chip, the Si5380 device delivers high board-level noise immunity, integrated power supply noise rejection and consistent, repeatable phase noise performance across temperature. While VCXO-based clock solutions often suffer from degraded spurious performance when subjected to vibration, the Si5380 device’s integrated DSPLL technology provides excellent spurious response regardless of the system environment. Furthermore, the Si5380 clock guarantees low phase noise operation when locked to a high jitter input clock, ensuring that data converter performance is not degraded by external effects. The Si5380 generates 4G/LTE frequencies up to 1.47456 GHz and provides up to 12 independently configurable clocks, which can be used for clocking JESD204B-compliant data converters, FPGAs and other logic devices.

 

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Industry Analysis

SLAB

Industry Average

Valuation SLAB Industry Range
Price/Earnings 66.0x
Price/Sales 3.0x
Price/Book 2.5x
Price/Cash Flow 65.3x
TEV/Sales 2.4x
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