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Last €17.55 EUR
Change Today +0.58 / 3.42%
Volume 800.0
CDS On Other Exchanges
As of 5:18 AM 07/28/15 All times are local (Market data is delayed by at least 15 minutes).

cadence design sys inc (CDS) Snapshot

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Day High
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52 Week High
07/21/15 - €18.39
52 Week Low
10/15/14 - €12.26
Market Cap
Average Volume 10 Days
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Dividend Yield
Current Stock Chart for CADENCE DESIGN SYS INC (CDS)

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cadence design sys inc (CDS) Details

Cadence Design Systems, Inc. develops, sells, leases, and licenses electronic design automation (EDA) software, emulation and prototyping hardware, verification intellectual property (VIP), and design intellectual property (design IP) for semiconductor and electronics systems industries worldwide. It offers functional verification products, including logic verification software that enables customers to coordinate verification activities across multiple teams and various specialists for verification planning and closure; and system design and verification products for hardware-software verification, as well as for system power exploration, analysis, and optimization. The company also provides digital integrated circuits (ICs) design products, such as logic design products for chip planning, design, verification, and test technologies and services; physical implementation products for use in place and route, signal integrity, optimization, and double patterning preparation; and signoff products to signoff the design as ready for manufacture by a silicon foundry, as well as design for manufacturing products for use in the product development process. In addition, it offers custom IC design and verification products to create schematic and physical representations of circuits down to the transistor level for analog, mixed-signal, custom digital, memory, and RF designs; and system interconnect design products to develop printed circuit boards and IC packages. Further, the company provides design IP products consisting of pre-verified and customizable functional blocks to integrate into customer’s SoCs; and VIP and memory models for use in system-level verification to model correct behavior of full systems interacting with their environments. Additionally, it offers engineering, methodology, education, and hosted design solutions, as well as technical support and maintenance services. The company was founded in 1988 and is headquartered in San Jose, California.

6,100 Employees
Last Reported Date: 02/20/15
Founded in 1988

cadence design sys inc (CDS) Top Compensated Officers

Chief Executive Officer, President, Director ...
Total Annual Compensation: $650.0K
Chief Financial Officer and Senior Vice Presi...
Total Annual Compensation: $400.0K
Executive Vice President and General Manager ...
Total Annual Compensation: $412.5K
Chief of Staff to the Chief Executive Officer...
Total Annual Compensation: $375.0K
Senior Vice President and General Manager of ...
Total Annual Compensation: $375.0K
Compensation as of Fiscal Year 2014.

cadence design sys inc (CDS) Key Developments

Cadence Design Systems Inc. Announces Itseez OpenCV Library Now Available on Cadence Tensilica Image/Vision DSPs

Cadence Design Systems Inc. announced that the Itseez OpenCV library of computer vision acceleration algorithms is now available on the Cadence®Tensilica® image/video digital signal processors (DSPs). The OpenCV software suite was ported by vision industry experts at Itseez and optimized by Cadence to make it much easier for designers to accelerate their compute-intensive vision processing applications. The OpenCV library is well known for its advanced image processing, contour processing, computational geometry, various feature detectors and descriptors, object tracking, optical flow, camera calibration and machine learning tools. The Tensilica IVP DSP was designed for the complex algorithms in imaging, video and computer vision applications including innovative multi-frame image capture, video pre- and post-processing, object and face recognition, low-light enhancement and many other complex tasks.

Cadence Design Systems Inc., Q2 2015 Earnings Call, Jul 27, 2015

Cadence Design Systems Inc., Q2 2015 Earnings Call, Jul 27, 2015

Cadence Design Systems, Inc. and Applied Materials, Inc. Collaborates to Optimize CMP Process

Cadence Design Systems, Inc. and Applied Materials, Inc. announced that it have collaborated on a development program to optimize the chemical-mechanical planarization, or CMP, process through silicon characterization and modeling for advanced-node designs at 14nm and below. The program allows design teams to predict the impact of CMP on both functional yield and parametric yield, and for manufacturing teams to boost planarization performance, which is increasingly critical for advanced FinFET architectures. The Cadence and Applied Materials joint development program is focused on front end of line (FEOL) and wafer-level CMP modeling. Applied Materials can use the Cadence CMP Process Optimizer, a tool that allows silicon calibration of semi-physical models and optimization of CMP material and process parameters such as pressure, polish time and overall CMP uniformity, to enhance the precision performance of its Reflexion LK Prime CMP system. Once models are calibrated, design teams can leverage Cadence CMP Predictor, a tool that enhances design performance and yield through model-based CMP hotspot detection and CMP-aware RC extraction. It provides full-chip, multi-level CMP thickness and topography predictions for shallow trench isolation (STI) and replacement metal gate (RMG) CMP processes.


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Valuation CDS Industry Range
Price/Earnings 36.6x
Price/Sales 3.4x
Price/Book 4.1x
Price/Cash Flow 30.0x
TEV/Sales 2.5x

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