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April 27, 2015 5:42 PM ET


Company Overview of Atrenta Inc.

Company Overview

Atrenta Inc. designs and develops system on chip realization solutions for semiconductor and consumer electronics industries. It offers SpyGlass that pinpoints structural, coding, and consistency problems in register transfer language (RTL) descriptions; SpyGlass Design for test that enables users to fine tune testability during RTL creation; SpyGlass Power that detects and automatically fixes key power management issues, as well as helps users manage the complexity of multiple power and voltage domains, and verifies power intent defined in UPF; and SpyGlass Constraints that automatically generates new constraints from RTL or netlists based on the topology of the design. The company also pro...

2077 Gateway Place

Suite 300

San Jose, CA 95110

United States

Founded in 1995





Key Executives for Atrenta Inc.

Founder, Chairman, Chief Executive Officer and President
Chief Operating Officer
Senior Vice President of Engineering
Vice President and Managing Director of India Operations
Chief Technology Officer
Compensation as of Fiscal Year 2014.

Atrenta Inc. Key Developments

Atrenta Inc. Presents at 17th Annual Needham Growth Conference, Jan-13-2015 11:20 AM

Atrenta Inc. Presents at 17th Annual Needham Growth Conference, Jan-13-2015 11:20 AM. Venue: New York Palace Hotel, 455 Madison Avenue, New York, New York, United States.

MediaTek Adopts Atrenta, Inc.'s SpyGlass DFT (Design for Test) Tool

Atrenta, Inc. announced that MediaTek has adopted Atrenta's SpyGlass DFT (Design for Test) tool suite to enhance its semiconductor design and verification flow. This addition has helped the team achieve stringent test coverage goals while meeting their challenging schedules. Previous workflows waited until after implementation to look at testability of the design. This caused an increase in time and difficulty, to find and fix the many types of problems that can occur, often back in the RTL (Register Transfer Level) description. Atrenta allows the designers to determine and address testability issues upfront, in the RTL, while it is more feasible and cost effective to do so.

Sonics Adopts Atrenta's SpyGlass Constraints Tools to Enhance its Semiconductor Intellectual Property Signoff Flow

Atrenta Inc. announced that Sonics has adopted Atrenta's SpyGlass Constraints tools to enhance its semiconductor intellectual property signoff flow. This addition will ensure that Sonics continues to provide the high quality IP including fully verified timing exceptions, false and multi-cycle paths, across the many configurations of its products. Sonics has developed patented technology to automate the hierarchical verification of arbitrary configurations of its IP, ensuring that customer configurations will work. SpyGlass Constraints provides an added boost to Sonics' IP verification methodology, specifically for multiple clock configurations generated in constrained random fashion during nightly regression runs. SpyGlass Constraints delivers timing restrictions and exceptions through patented technologies within its timing analysis engines. With SpyGlass Constraints incorporated into its SpyGlass IP Kit flow along with SpyGlass Lint and SpyGlass CDC for structural and functional verification, Sonics provides the high quality assurance for its on-chip network IP.

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