Company Overview of Carbon Design Systems, Inc.
Carbon Design Systems, Inc. provides virtual prototype solutions to execute MIPS. It offers Carbon SoC Designer Plus, a virtual prototype solution for the development, execution, and analysis of virtual system platforms; Carbon Model Studio, a solution for the automatic generation, validation, and execution of hardware-accurate software models; and Carbon Performance Analysis Kits (CPAK), which are pre-built virtual reference platforms to design models for critical performance elements, including processors, fabric, and memory controllers. The company also provides solutions for performance optimization, system validation, software execution, deployment, and traffic generation and analysis. ...
125 Nagog Park
Acton, MA 01720
Founded in 2002
Key Executives for Carbon Design Systems, Inc.
Chief Executive Officer, President and Director
Co-Founder, Chief Technology Officer and Vice President of Business Development
President of Carbon Japan KK
Vice President of Sales - Europe and ROA
Vice President of Engineering
Compensation as of Fiscal Year 2016.
Carbon Design Systems, Inc. Key Developments
Carbon Design Systems, Inc. and Breker Verification Systems, Inc. Announces Availability of Carbon Performance Analysis Kits
Oct 7 14
Carbon Design Systems, Inc. and Breker Verification Systems, Inc. announced availability of Carbon Performance Analysis Kits (CPAKs) pre-loaded with embedded system verification software and a direct link to Breker's TrekSoC(TM) visualization environment. The joint solution will enable virtual prototype users to validate the functionality and architectural features of their system-on-chip (SoC) designs using self-verifying, system-level software test cases. As one element of the partnership, Breker will publish CPAKs containing the embedded tests and TrekSoC integration on Carbon's System Exchange web portal. Engineers will be able to quickly modify or extend this design to model the behavior of their own SoC. The system tests generated by TrekSoC enable verification of critical system-level issues such as cache coherency, intellectual property (IP) integration, data ordering, multiple CPU interactions, and other issues typically found later in the design cycle when they are more difficult to address.
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