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October 04, 2015 6:02 AM ET

Semiconductors and Semiconductor Equipment

Company Overview of GLOBALFOUNDRIES Inc.

Company Overview

GLOBALFOUNDRIES Inc. provides semiconductor manufacturing services to high tech customers worldwide. It offers direct and indirect supplementary, post-wafer-manufacturing, prototyping, mask, manufacturing, 300mm, 200mm, lean manufacturing, APM framework, supply chain management, and turnkey services. The company was founded in 2009 and is based in Milpitas, California with manufacturing centers in Germany; Malta, New York; and Singapore. It has regional sales and support offices in Shanghai, Yokohama, Hsinchu, Austin, London, and Munich. The company also has research, development, and design enablement facilities in San Francisco, California; and Dresden, Germany.

840 North McCarthy Boulevard

Milpitas, CA 95035

United States

Founded in 2009



Key Executives for GLOBALFOUNDRIES Inc.

Chief Executive Officer
Age: 51
Chief Technology Officer and Senior Vice President
Chief Legal Officer, Senior Vice President and Secretary
Age: 60
Senior Vice President and General Manager of Singapore Operations
Age: 56
Senior Vice President and Head of Program Management
Compensation as of Fiscal Year 2015.

GLOBALFOUNDRIES Inc. Key Developments

GLOBALFOUNDRIES Launches 22FDX™ FD-SOI Technology Platform

GLOBALFOUNDRIES launched a new semiconductor technology developed specifically to meet the ultra-low-power requirements of the next generation of connected devices. The 22FDX™ platform delivers FinFET-like performance and energy-efficiency at a cost comparable to 28nm planar technologies, providing an optimal solution for the rapidly evolving mainstream mobile, Internet-of-Things (IoT), RF connectivity and networking markets. While some applications require the ultimate performance of three-dimensional FinFET transistors, most wireless devices need a better balance of performance, power consumption and cost. 22FDX provides the best path for cost-sensitive applications by leveraging the industry’s first 22nm two-dimensional, fully-depleted silicon-on-insulator (FD-SOI) technology. It offers industry’s lowest operating voltage at 0.4 volt, enabling ultra-low dynamic power consumption, less thermal impact, and smaller end-product form-factors. The 22FDX platform delivers a 20% smaller die size and 10% fewer masks than 28nm, as well as nearly 50% fewer immersion lithography layers than foundry FinFET. 22FDX leverages the high-volume 28nm platform in company's 300mm production line in Dresden, Germany. This technology heralds a new chapter in the Silicon Saxony story, building on almost 20 years of sustained investment in Europe’s large semiconductor fab. The company's 22FDX platform enables software-control of transistor characteristics to achieve real time tradeoff between static power, dynamic power and performance. This platform consists of a family of differentiated products architected to support the needs of various applications: 22FD-ulp: For the mainstream and low-cost smartphone market, the base ultra-low power offering provides an alternative to FinFET. Through the use of body-biasing, 22FD-ulp delivers greater than 70% power reduction compared to 0.9 volt 28nm HKMG, as well as performance equivalent to FinFET. For certain IoT and consumer applications, the platform can operate at 0.4 volt, delivering up to 90% power reduction compared to 28nm HKMG. 22FD-uhp: For networking applications with analog integration, this offering is optimized to achieve the same ultra-high performance capabilities of FinFET while minimizing energy consumption. 22FD-uhp customizations include forward body-bias, application optimized metal stacks, and support for 0.95 volt overdrive. 22FD-ull: The ultra-low leakage offering for wearables and IoT delivers the same capabilities of 22FD-ulp, while reducing leakage to as low as 1pa/um. This combination of low active power, ultra-low leakage, and flexible body-biasing can enable a new class of battery-operated wearable devices with an order of magnitude power reduction. 22FD-rfa: The radio frequency analog offering delivers 50% lower power at reduced system cost to meet the stringent requirements of high-volume RF applications such as LTE-A cellular transceivers, high order MIMO WiFi combo chips, and millimeter wave radar. The RF active device back-gate feature can reduce or eliminate complex compensation circuits in the primary RF signal path, allowing RF designers to extract more of the intrinsic device Ft performance.

IBM Research in Partnership with GLOBALFOUNDRIES and Samsung Produces 7nm Node Test Chips

An alliance led by IBM Research announced that it has produced the semiconductor industry's first 7nm (nanometer) node test chips with functioning transistors. The breakthrough, accomplished in partnership with GLOBALFOUNDRIES and Samsung at SUNY Polytechnic Institute's Colleges of Nanoscale Science and Engineering (SUNY Poly CNSE), could result in the ability to place more than 20 billion tiny switches -- transistors -- on the fingernail-sized chips that power everything from smartphones to spacecraft. To achieve the higher performance, lower power and scaling benefits promised by 7nm technology, researchers had to bypass conventional semiconductor manufacturing approaches. Among the novel processes and techniques pioneered by the IBM Research alliance were a number of industry-first innovations, most notably Silicon Germanium (SiGe) channel transistors and Extreme Ultraviolet (EUV) lithography integration at multiple levels. Industry experts consider 7nm technology crucial to meeting the anticipated demands of future cloud computing and Big Data systems, cognitive computing, mobile products and other emerging technologies. Part of IBM's $3 billion, five-year investment in chip R&D (announced in 2014), this accomplishment was made possible through a unique public-private partnership with New York State and joint development alliance with GLOBALFOUNDRIES, Samsung and equipment suppliers. The team is based at SUNY Poly's NanoTech Complex in Albany. Microprocessors utilizing 22nm and 14nm technology power servers, cloud data centers and mobile devices, and 10nm technology is well on the way to becoming a mature technology. The IBM Research-led alliance achieved close to 50% area scaling improvements over today's most advanced technology, introduced SiGe channel material for transistor performance enhancement at 7nm node geometries, process innovations to stack them below 30nm pitch and full integration of EUV lithography at multiple levels. These techniques and scaling could result in at least a 50% power/performance improvement for next generation mainframe and POWER systems that will power the Big Data, cloud and mobile era. The 7nm node milestone continues IBM's legacy of historic contributions to silicon and semiconductor innovation. They include the invention or first implementation of the single cell DRAM, the Dennard Scaling Laws, chemically amplified photoresists, copper interconnect wiring, Silicon on Insulator, strained engineering, multi core microprocessors, immersion lithography, high speed SiGe, High-k gate dielectrics, embedded DRAM, 3D chip stacking and Air gap insulators.

Silicon Storage Technology and Globalfoundries Announce Qualification of Automotive Grade 55NM Embedded Flash Memory Technology

Microchip Technology Inc., through its Silicon Storage Technology subsidiary, and GLOBALFOUNDRIES announced the full qualification and availability of SST's 55nm embedded SuperFlash® non-volatile memory (NVM) on GLOBALFOUNDRIES' 55nm Low Power Extended (LPx)/RF enabled platform. The qualification of GLOBALFOUNDRIES' 55nm, split-gate-cell SuperFlash technology-based process was performed according to JEDEC standards. This process technology also met the requirements of AEC-Q100 Grade 1 qualification with an ambient temperature range of -40°C to 125°C, and demonstrated endurance of 100K program/erase cycles with more than 20 years of data retention at 150°C.

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