Intel Corp. co-founder Gordon E. Moore always insisted that shrinking the size of transistors and circuit lines is only one aspect of Moore's Law -- the tenet that chip power doubles every 18 months. Just as important, he says, is "cleverness" in designing chip layouts and in engineering new materials. If he had to pick today's cleverness champ in materials, it might well be IBM. Over the last four years, Big Blue has unveiled a string of chip innovations that make chips run faster and more efficiently.
On June 13, IBM will do it again. It's scheduled to unveil its latest materials breakthrough at a chip-technology conference in Kyoto, Japan, BusinessWeek Online has learned. The process is dubbed strained silicon -- but don't let the jargon mislead you. "Strained" doesn't bear any negative connotation. Instead, it means electrons can jump through transistors up to 70% faster than they do in state-of-the-art chips.
Combined with the improved speed of electrons in copper wires, which IBM also pioneered, tomorrow's chips could post a total speed gain of 35%, Big Blue estimates, with the same-size circuitry. That will translate into faster computers, more powerful mobile phones, and cheaper telecom equipment.
What gets "strained," or stretched, is the atomic structure of the silicon crystal. Building on the technology it introduced in 1998 for high-speed telecom chips, IBM engineers grow a layer of silicon on top of germanium, another semiconducting material. Germanium's crystalline lattice has slightly larger spaces between its atoms than does silicon.
The germanium atoms tug at their silicon neighbors, trying to get them to line up with the same spacing. That doesn't happen, but the tugging does subtly increase the gap between the silicon atoms. This provides an enlarged space through which electrons that transmit signals can flow without being slowed down by bumping into an atom -- hence the 70% speed boost while electrons hop through transistors.
"It gives you a fundamentally new plateau to start from," says Bijan Davari, a fellow and vice-president of semiconductor development at IBM Microelectronics. Until now, compound silicon-germanium technology has been used just for bipolar transistors. These superspeedy devices can cope with data flows of up to 200 gigahertz per second, roughly 200 times what the best ordinary silicon chips can handle. However, the process for making bipolar transistors isn't compatible with the chip industry's workhorse fabrication technology, called CMOS, for complementary metal-oxide silicon. CMOS transistors dominate chip markets because they're smaller and consume less power than their bipolar cousins.
"What we've done now," boasts Davari, "is preserve the advantages of CMOS -- it's 99%-plus of the semiconductor industry -- while moving up to a new speed range. You just change the material, and circuit speed goes up."
There's more, he adds. Silicon-germanium CMOS transistors can also be combined with the silicon-on-insulator (SOI) technology that IBM launched in 1998. SOI puts a dam under the circuitry to prevent electrons from leaking into the silicon below. Result: Not only does this trim the power needed to drive the chip, it also allows transistors to be stacked on top of each other. So the number of transistors on a chip can rise, literally, without the size of the transistors being reduced.
"What's exciting about these new materials technologies is that they're additive," Davari points out. "They're like the steps on a staircase leading to higher and higher performance." Look for the hot new IBM chips to hit the market as soon as 2003.
By Otis Port in New York
Edited by Alex Salkever