Make transistors small enough, and all kinds of good things happen. For example, if a transistor can be shrunk to 0.1 micron wide, or 0.1% the diameter of a human hair, electrons will shoot across it without bumping into lots of other subatomic particles. These collisions are what slow down signals in chips and generate most of the heat. Thus, tighter dimensions may yield chips that process data at superfast speeds without creating so much heat that they melt.
Until recently, physics seemed to rule out 0.1-micron transistors in silicon, so research focused on gallium arsenide. But a new concept for making supersmall silicon transistors has been developed by Raphael Tsu, a solid-state physicist at the University of North Carolina and the chief researcher of New York-based Nanodynamics Inc. The key is putting an ultrathin layer of silicon dioxide insulation under the transistors, which keeps the electrons in check until a signal arrives. This layer must be only a couple of atoms thick; otherwise, its crystalline structure won't match up with the silicon, and the two materials will peel apart, destroying the transistors. Tsu's idea is more than just a theory. Nanodynamics has built prototype equipment that has produced 0.1-micron transistors by printing on silicon with X-rays instead of light.