eASIC Announces Support for GigaChip Interface
eASIC and MoSys demonstrate 12.5Gbps interoperability between eASIC Nextreme-3
and MoSys Bandwidth Engine IC.
SANTA CLARA, Calif. -- May 13, 2014
eASIC Corporation, a leading provider of Single Mask Adaptable ASIC™ devices
and MoSys, Inc., a leader in semiconductor solutions that enable fast,
intelligent data access for network and communications systems, today
announced successful hardware interoperability at 10.3125Gbps and 12.5Gbps
between the MGIO (Multi Gigabit I/O) serial transceivers on eASIC’s Nextreme-3
28nm family and the CEI-11 compatible interface on the MoSys® Bandwidth
eASIC® Nextreme-3 28nm product contains up to 52 high speed 12.5Gbps
transceivers and up to 18M equivalent gates. The MGIO transceivers feature
advanced transmitter and receiver equalization capabilities coupled with low
power consumption making them ideal for a wide variety of systems in
networking, computing, and storage applications. The GigaChipTM Interface
consumes less than 3% of the eASIC Nextreme-3 N3XT1800 device.
The GigaChip Interface (GCI) is a scalable, high-performance, serial protocol
for chip-to-chip communications that delivers system-level benefits of reduced
power, cost and complexity. Current implementations built with compatible
CEI-11G or XFI SerDes electrical transport standards deliver up to 180Gbps of
full duplex throughput using 16 SerDes lanes when running at a 12.5Gbps rate.
A key differentiator for the GCI protocol is high transport efficiency, even
for small payloads, which makes GCI ideal for co-processor, memory, or
multi-chip communication. The interface also includes CRC error detection and
automatic error recovery provisions to meet the high-reliability requirements
of enterprise, service provider, and mission critical communications and
GCI is an open, royalty-free, interface specification originally designed by
MoSys for use with the Bandwidth Engine family of ICs and is suitable for any
"We are seeing a major trend towards high speed serial chip-to-chip
interconnect which is driven by the system requirements for 40G, 100G and
beyond," said Jasbinder Bhoot, vice president of worldwide marketing at eASIC.
"The combination of our ability to deliver high performance, low NRE and
fast-time to market ASIC devices and the GigaChip Interface benefits of
reduced complexity, power and cost, solves the system memory bandwidth
limitations in 100G+ carrier-class and enterprise equipment.”
"eASIC is a leader in single mask ASICs and we are pleased to have its support
of the GigaChip Interface for its networking customers," said John Monson, VP
of marketing and sales for MoSys. "Leveraging the GigaChip Interface with the
Bandwidth Engine accelerated memory access and offload capabilities combined
with the eASIC Nextreme-3 arrays, our mutual customers will be able to deliver
differentiated high performance networking solutions in less time, using less
space and at lower cost."
About MoSys, Inc.
MoSys, Inc. (NASDAQ: MOSY) is a fabless semiconductor company enabling leading
equipment manufacturers in the networking and communications systems markets
to address the continual increase in Internet users, data and services. The
company's solutions deliver data path connectivity, speed and intelligence
while eliminating data access bottlenecks on line cards and systems scaling
from 100G to multi-terabits per second. Engineered and built for
high-reliability carrier and enterprise applications, MoSys'Bandwidth Engine®
and LineSpeed™ IC product families are based on the company's patented
high-performance, high-density intelligent access and high-speed serial
interface technology, and utilize the company's highly efficient GigaChip™
Interface.MoSysis headquartered inSanta Clara, California. More information
is available atwww.mosys.com.
Bandwidth Engine andMoSysare registered trademarks ofMoSys, Inc.in the US
and/or other countries. GigaChip and LineSpeed are trademarks ofMoSys,
Inc.All other marks mentioned herein are the property of their respective
eASIC is a fabless semiconductor company offering breakthrough Single Mask
Adaptable ASIC devices aimed at dramatically reducing the overall cost and
time-to-production of customized semiconductor devices. Low-cost,
high-performance and fast-turn ASIC and System-on-Chip designs are enabled
through patented technology utilizing Via-layer customizable routing. This
innovative fabric allows eASIC to offer a new generation of ASICs with
significantly lower up-front costs than traditional ASICs. Privately held
eASIC Corporation is headquartered in Santa Clara, California. Investors
include Khosla Ventures, Kleiner Perkins Caufield and Byers (KPCB), Crescendo
Ventures, Seagate Technology and Evergreen Partners. For more information on
eASIC please visit www.easic.com.
Lisseth Mariscal, 408-855-9200
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