Lattice Announces MachXO3 FPGA Family; Most Advanced, Lowest Cost per I/O
Programmable Bridging and I/O Expansion Solution
MachXO3 FPGA Family Brings 640 to 22K Logic Cells, Lowest Power, 1
Cent per I/O, and Hard IP Blocks to Ease Implementation of Emerging
HILLSBORO, OR -- (Marketwired) -- 09/24/13 -- Lattice Semiconductor
Corporation (NASDAQ: LSCC) today announced its ultra-low density
MachXO3(TM) Field Programmable Gate Array (FPGA) family, the world's
smallest, lowest-cost-per I/O programmable platform aimed at
expanding system capabilities and bridging emerging connectivity
interfaces using both parallel and serial I/O. By matching advanced,
small-footprint packaging with on-chip resources, the MachXO3 family
puts affordable innovation into the hands of system architects by
simplifying the implementation of emerging connectivity interfaces
such as MIPI, PCIe, GbE, and much more.
The ultra-low density MachXO3 FPGA family gives customers a single
programmable bridge that lets them build differentiated systems using
the latest components and interface standards. With advanced package
technology solutions that eliminate bond wires to enable lowest-cost
and increased I/O density in a small footprint, the MachXO3 family
can be used across market segments, including consumer,
communications, compute, storage, industrial and automotive.
"The MachXO3 family allows designers to address the disparity among
the components within their systems with minimal impact on cost,
footprint, and power consumption," said Brent Przybus, Sr. Director,
Product and Corporate Marketing. "As system performance and
complexity increases, I/O interfaces often become the bottleneck.
Designers want to use the most advanced components, but have to deal
with any number of interface standards, many of which are still
evolving or are new to many designers, such as MIPI."
Breakthrough Technology to Do More with Less
Lattice's MachXO(TM) and MachXO2(TM) families of instant-on,
non-volatile programmable devices have set the standard for providing
system architects complete, low-cost options to expand general
purpose I/O, bridge interfaces and minimize total system power.
Leveraging a low power architecture built on 40nm process technology
to deliver lower cost with increased performance for power sensitive
applications, the new MachXO3 family delivers a new set of
capabilities that enable system engineers to do even more in a
The new 640-to-22K logic-cell family makes use of the latest in
package technology to not only deliver tiny 2.5x2.5mm wafer-level
chip-scale packaging, but also 540 I/O count devices, as well as
devices with 3.125Gbps SERDES capabilities to cover the full spectrum
of bridging and interface requirements in consumer, industrial,
communications, automotive, and compute markets.
Supported by Lattice Diamond(R) software, as well as IP and
application expertise both in-house and by third parties, the MachXO3
FPGA family is a complete solution that delivers:
-- Industry's lowest static and dynamic power consumption for consumer,
industrial, and automotive systems where uW static and mW active power
enables FPGA programmability to solve difficult problems.
-- Advanced programmable fabric that supports up to 150MHz performance,
and includes integrated DSP and memory resources.
-- Multi-time programmable (MTP) technology enables in-field upgrades and
instant-on operation for applications in communications, storage and
compute markets where I/O interfaces must be live before the rest of
the system. Customers can even configure the device from a processor
or external PROM, arguably giving them the most flexible solution
available for overcoming interfacing and bridging challenges.
-- The industry's most complete MIPI based solutions using hard blocks
and soft IP to not only achieve high bandwidth programmable bridging
for applications such as 4Kx2K video, 40MPixel image sensor
interfaces, but to also enable access to the latest MIPI compliant
components for advanced differentiation.
-- Integrated hard PCIe, and GbE IP enables high speed control
interfaces, as well as high bandwidth data bridges in the lowest
power, lowest cost ultra-low density FPGAs.
-- Hot-swapI/O eliminates system downtime in communication, storage and
compute applications by enabling components to be swapped out without
taking the rest of the system down.
-- Simplified single supply solution that leverages on-chip regulators to
operate within the customer's environment.
-- Automotive and Industrial temperature range support.
To learn more about Lattice's New MachXO3 FPGA family and
ultra-low-density FPGAs, please visit www.latticesemi.com/MachXO3.
Pricing and Availability
Details of the MachXO3 family are available
today, with software availability and first production device
shipments scheduled for the end of 2013 and pricing starting below
$1.00 in high volume.
About Lattice Semiconductor
Lattice is a service-driven developer of
innovative low cost, low power programmable design solutions. For
more information about how our FPGA, CPLD and power management
devices help our customers unlock their innovation, visit
www.latticesemi.com. You can also follow us via Twitter, Facebook, or
Lattice Semiconductor Corporation, L (& design) Lattice
Semiconductor, Lattice (& design), L (& design), Lattice Diamond,
MachXO3, MachXO2, MachXO, and specific product designations are
either registered trademarks or trademarks of Lattice Semiconductor
Corporation or its subsidiaries in the United States and/or other
MIPI is a licensed trademark of MIPI, Inc. in the U.S. and other
GENERAL NOTICE: Other product names used in this publication are for
identification purposes only and may be trademarks of their
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For Further Information:
Lattice Semiconductor Corporation
408 826 6023
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