Altera Quartus II Software v13.0 Enables World's Fastest FPGA Designs

    Altera Quartus II Software v13.0 Enables World's Fastest FPGA Designs

Delivers Industry's Highest Performance Designs in Half the Time Compared to
Previous Release

PR Newswire

SAN JOSE, Calif., May 6, 2013

SAN JOSE, Calif., May 6, 2013 /PRNewswire/ --Altera Corporation (NASDAQ:
ALTR) today announced the release of its Quartus® II software version 13.0,
which delivers the highest levels of FPGA and SoC performance and designer
productivity. Users targeting 28 nm FPGAs and SoCs will experience on average
a 25 percent reduction in compile times. The most difficult-to-close designs
targeting high-end 28 nm Stratix® V FPGAs will see compilation times slashed
by 50 percent on average compared to the previous software release. Quartus II
software v13.0 enables designs targeting Stratix V FPGAs to achieve the
fastest Fmax of any FPGA in the industry with a two speed-grade advantage over
the nearest competitor.

The release also includes enhancements to the development suite's high-level
C-based, system-/IP-based, and model-based design flows:

  oSDK for OpenCL opens the world of massively-parallel FPGA-based
    accelerators to software programmers without FPGA experience. The OpenCL
    parallel programming model delivers the fastest path from code-to-hardware
    implementation. Software programmers targeting FPGAs achieve higher
    performance at significantly lower power compared to alternative hardware
    architectures. See today's press release for more information on the SDK
    for OpenCL and for more information on Altera's newly announced Preferred
    Board Partner Program for OpenCL.
  oQsys system integration tool provides expanded support for ARM®-based
    Cyclone® V SoCs. Now Qsys can generate industry-standard AMBA® AHB and APB
    bus interfaces in the FPGA fabric. Further, these interfaces comply with
    ARM's TrustZone® requirements, allowing customers to partition an entire
    SoC-FPGA-based system between a secure world for critical system resources
    and a non-secure world for everything else.
  oDSP Builder design tool enables system developers to effectively implement
    high-performance fixed- and floating-point algorithms into their DSP
    designs. New features include additional math.h functions with enhanced
    precision and rounding parameterization, parameterizable FFT blocks for
    fixed- and floating-point FFTs, more efficient folding capability and
    improved resource sharing.

For additional information about the features offered in Quartus II software
v13.0, visit Altera's What's New in Quartus II Software web page.

Pricing and Availability
Both the Subscription Edition and the free Web Edition of Quartus II software
v13.0 are now available for download. Altera's software subscription program
makes it easy to obtain Alteradesign software by consolidating software
products and maintenance charges into one annual subscription payment.
Subscribers receive Quartus II software, the ModelSim®-Altera Starter edition,
and a full license to the IP Base Suite, which includes Altera's most popular
IP (DSP and memory) cores. The annual software subscription is $2,995 for a
node-locked PC license and is available for purchase atAltera's eStore. The
Altera SDK for OpenCL is currently available as a separate download on
Altera's website. The annual software subscription for the SDK for OpenCL is
$995 for a node-locked PC license.

About Altera
Altera® programmable solutions enable system and semiconductor companies to
rapidly and cost-effectively innovate, differentiate and win in their markets.
Find out more about Altera'sFPGA,SoC, CPLDandASICdevices
atwww.altera.com. Follow Altera viaFacebook,RSSandTwitter.

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Editorial Contact:
Steve Gabriel
Altera Corporation
(408) 544-6397
newsroom@altera.com

SOURCE Altera

Website: http://www.altera.com