Altera and ARM Announce Industry's First FPGA-Adaptive Embedded Software
Unique Partnership Creates DS-5 Toolkit That Removes Debugging Barriers for
SoC FPGA Devices
SAN JOSE, Calif., Dec. 12, 2012
SAN JOSE, Calif., Dec. 12, 2012 /PRNewswire/ -- Altera Corporation (NASDAQ:
ALTR) and ARM (LON: ARM; NASDAQ: ARMH) today announced that, with a unique
agreement, the companies have jointly developed a DS-5 embedded software
development toolkit with FPGA-adaptive debug capabilities for Altera SoC
devices. The ARM^® Development Studio 5 (DS-5™) Altera Edition toolkit is
designed to remove the debugging barrier between the integrated dual-core CPU
subsystem and FPGA fabric in Altera SoC devices. By combining the most
advanced multi-core debugger for the ARM architecture with the ability to
adapt to the logic contained in the FPGA, the new toolkit provides embedded
software developers an unprecedented level of full-chip visibility and control
through the standard DS-5 user interface. The new toolkit will be included in
the Altera SoC Embedded Design Suite and will begin shipping in early 2013.
Altera SoC devices combine a dual-core ARM Cortex-A9 processor with FPGA logic
on a single device, giving users the power and flexibility to create custom
field-programmable SoC variants by implementing user-defined peripherals and
hardware accelerators in the FPGA fabric. Altera is currently shipping initial
samples of its Cyclone® V SoC devices. See the press release "Altera Ships Its
First SoC Devices" announced today.
The ARM Development Studio 5 (DS-5) Altera Edition toolkit dynamically adapts
to unique customer configurations of the FPGA within the SoC to seamlessly
extend embedded debugging capabilities across the CPU-FPGA boundary and unify
all software debugging information from the CPU and FPGA domains with the
standard DS-5 user interface. When combined with the advanced multi-core
debugging capability of the DS-5 Debugger, and the link to the Quartus® II
software SignalTap logic analyzer for cross-triggering capability, the toolkit
delivers an unprecedented level of debugging visibility and control that leads
to substantial productivity gains.
"Disruptive, innovative silicon devices demand equally disruptive and
innovative software tools. That demand has been met by this innovative toolkit
for Altera 28 nm Cyclone V and Arria V SoC devices and for upcoming Altera 20
nm SoC devices," said John Cornish, executive vice president of the System
Design Division at ARM. "This technical innovation has unified CPU debugging
with FPGA debugging to bolster user productivity. Altera and ARM have made
this advanced tool technology with premium, productivity-boosting features
widely available through Altera SoC development kits and the Altera SoC
Embedded Design Suite. We believe this combination will deliver valuable
benefits to our mutual customers."
The ARM DS-5 toolkit suite offers the most advanced multi-core debugger in the
market for the ARM architecture. It supports debugging on systems running in
asymmetric multiprocessing (AMP) and symmetric multiprocessing (SMP) system
configurations. It is broadly used for board bring-up, driver development, OS
porting, bare-metal and Linux application development, through JTAG and
Ethernet debugging interfaces, and offers Linux and RTOS awareness.
"We are very proud of the partnership and innovation in this joint work with
ARM," said Vince Hu, vice president of product and corporate marketing at
Altera. "The ARM DS-5 Altera Edition toolkit gives software engineers an
incredibly powerful development and debugging tool, allowing for the fastest
development time for our SoC devices."
Key Features and Benefits:
The ARM DS-5 Altera Edition toolkit features the following capabilities:
oSoftware debug view adapts to include the peripheral devices programmed by
the developer into the FPGA fabric, providing a seamless view of both the
hard and soft peripheral register memory map of the entire SoC.
oThe DS-5 Debugger simultaneously displays debug/trace data for the
Cortex-A9 processor cores and CoreSight™-compliant custom logic cores
implemented in the FPGA fabric.
oAltera USB Blaster JTAG debug cable supports both the DS-5 debugger and
other Altera JTAG-based tools for the Altera SoC device.
oAllows non-intrusive capture and visualization of signal events in the
FPGA fabric that can be time-correlated with software events and processor
oSupports advanced, signal-level hardware cross-triggering between the CPU
and FPGA logic domains, which enables cross-domain hardware/software
oIncludes the DS-5 Streamline performance analyzer, which correlates
software thread and event information with hardware counters from both the
SoC and FPGA, enabling the identification and correction of system-level
Pricing and Availability
The ARM DS-5 Altera Edition toolkit for Altera SoCs is being presented at the
ARM Technical Symposium in Paris on December 13, 2012. This toolkit will be
included in the Altera SoC Embedded Design Suite (Altera SoC EDS) Subscription
Edition for $995. More information about the Altera SoC EDS can be found at
www.altera.com/soc-eds. More information about the ARM DS-5 Altera Edition
toolkit can be found at www.altera.com/ds-5-ae. The Altera SoC EDS will start
shipping in early 2013.
ARM designs the technology that is at the heart of advanced digital products,
from wireless, networking and consumer entertainment solutions to imaging,
automotive, security and storage devices. ARM's comprehensive product offering
includes RISC microprocessors, graphics processors, video engines, enabling
software, cell libraries, embedded memories, high-speed connectivity products,
peripherals and development tools. Combined with comprehensive design
services, training, support and maintenance, and the company's broad Partner
community, they provide a total system solution that offers a fast, reliable
path to market for leading electronics companies.
Altera programmable solutions enable system and semiconductor companies to
rapidly and cost-effectively innovate, differentiate and win in their markets.
Find out more about Altera's FPGA, SoC, CPLD and ASIC devices at
www.altera.com. Follow Altera via Facebook, RSS and Twitter.
ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS and STRATIX
words and logos are trademarks of Altera Corporation and registered in the
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SOURCE Altera Corporation
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