Altera and Northwest Logic Develop RLDRAM 3 Memory Interface Solution Enables Use of High-Performance RLDRAM 3 Memory with Leading-Edge FPGAs in High-End Networking Applications PR Newswire SAN JOSE, Calif., Nov. 13, 2012 SAN JOSE, Calif., Nov. 13, 2012 /PRNewswire/ -- Altera Corporation (NASDAQ: ALTR) and Northwest Logic, a leading provider of high-performance intellectual property (IP) cores for FPGAs, today announced the immediate availability of a hardware-proven 1,600 Mbps Reduced Latency DRAM 3 (RLDRAM® 3) memory interface solution for use in its high-end 28 nm Stratix® V FPGAs. The RLDRAM 3 memory interface combines auto-calibrated RLDRAM 3 UniPHY IP from Altera and a full-featured RLDRAM 3 controller core from Northwest Logic to significantly simplify interface design between RLDRAM 3 memory and the FPGA while maximizing memory throughput in high-end networking applications. This jointly-developed RLDRAM 3 memory interface solution has been hardware-validated in customer designs using Micron Technology's RLDRAM 3 memory. (Logo: http://photos.prnewswire.com/prnh/20101012/SF78952LOGO) The Altera® Stratix V family of FPGAs is optimized to support Micron Technology's next-generation RLDRAM 3 memory. Stratix V devices feature a memory architecture that delivers the FPGA industry's highest system performance with low latency and high efficiency. Stratix V FPGAs enable networking equipment manufacturers to transfer voice, video and data across the Internet quickly and efficiently. "FPGAs provide our customers with an effective way to optimize their network products to support the growth in data volume and track the changing network infrastructure," said Robert Feurle, Micron Technology's vice president of DRAM marketing. "Integrating Altera's high-end Stratix V FPGAs with RLDRAM 3 memory provides the high level of performance needed to accommodate the rapidly evolving memory requirements of our customers." The combination of Northwest Logic's RLDRAM 3 controller core and Altera's UniPHY IP provides a complete RLDRAM 3 solution, including high-efficiency BL=2 operation, minimal timing closure issues due to operating at a quarter clock rate, and support for a broad range of RLDRAM 3 memory configurations. "Our close partnership with Altera ensures we deliver proven solutions that our mutual customers can quickly implement into their systems with minimal effort," said Brian Daellenbach, president at Northwest Logic. "This RLDRAM 3 controller core gives developers of high-end networking application a high-performance, low-latency solution with speeds up to 1,600 Mbps." "Stratix V FPGAs feature an optimized RLDRAM 3 interface that dramatically improves the latency and performance of high-end systems," said Patrick Dorsey, senior director of component product marketing at Altera. "The high performance of our Stratix V FPGAs combined with the RLDRAM 3 controller core enables us to deliver the most efficient solutions for today's highest performance networking applications." Availability The RLDRAM 3 memory interface solution is available for use in Altera's high-performance Stratix V FPGAs. The RLDRAM 3 controller core is delivered and fully supported by Northwest Logic. To learn more information about Stratix V FPGAs, visit www.altera.com/stratixv. More information about the RLDRAM 3 solution can be found at www.nwlogic.com/products/memory-interface-solution/. About Northwest Logic Northwest Logic, founded in 1995 and located in Beaverton, Oregon, provides high-performance, silicon-proven, easy-to-use IP cores including high-performance Expresso Solution (PCI Express® 3.0, 2.1 and 1.1 cores and drivers), Memory Interface Solution (DDR4, DDR3, DDR2, LPDDR3, LPDDR2, Mobile DDR SDRAM; RLDRAM 3, RLDRAM II), and MIPI Solution (CSI-2, DSI). These solutions support a full range of platforms including ASICs, structured ASICs and FPGAs. For additional information, visit www.nwlogic.com. About Altera Altera programmable solutions enable system and semiconductor companies to rapidly and cost-effectively innovate, differentiate and win in their markets. Find out more about Altera's FPGA, CPLD and ASIC devices atwww.altera.com. Follow Altera via Facebook, RSS and Twitter. ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS and STRATIX words and logos are trademarks of Altera Corporation and registered in the U.S. Patent and Trademark Office and in other countries. All other words and logos identified as trademarks or service marks are the property of their respective holders as described at www.altera.com/legal. Editor Contact: Steve Gabriel Altera Corporation (408) 544-6846 email@example.com SOURCE Altera Corporation Website: http://www.altera.com
Altera and Northwest Logic Develop RLDRAM 3 Memory Interface Solution
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